How long does it take to develop a PCB prototype?

For a moderately complex board, four to eight weeks from requirements to a tested prototype is typical: one to two weeks on schematic and component selection, one to two on layout and review, one to two for fabrication and assembly, and one for bring-up and testing.

How many layers does my PCB need?

Two layers work for simple, low-speed designs. Four layers are strongly preferred once you have a fast microcontroller, a switching regulator, wireless components or sensitive analogue sections, because continuous ground and power planes solve signal integrity and EMC problems that are difficult to fix any other way.

What files does a PCB manufacturer need?

Gerber or ODB++ files for each layer, an NC drill file, a bill of materials with manufacturer part numbers, a pick-and-place file for assembly, and a fabrication note covering material, thickness, surface finish and any impedance requirements.

Why did my first PCB revision not work?

The most common causes are incorrect component footprints, missing decoupling capacitors, a power sequencing problem, or a mechanical conflict with the enclosure. This is why a peer review and a manufacturer DFM check before ordering are worth the time.

Should I use ENIG or HASL surface finish for prototypes?

ENIG for most prototype work. It provides a flat surface that suits fine-pitch components, tolerates rework better and has a longer shelf life. HASL is cheaper and acceptable for simple boards with larger components.

From Circuit Design to PCB Prototype

Stage 1: Requirements and Architecture

Before any schematic is drawn, the board's operating envelope has to be written down. Changing these decisions after layout is expensive; changing them after fabrication means a new board.

Power. Input source and range, every rail the board must generate, and the worst-case current on each.
Interfaces. Every connector and protocol the board must speak, including debug and programming access.
Environment. Temperature range, humidity, vibration, ingress protection.
Physical constraints. Board outline, maximum height, mounting hole positions, connector locations relative to the enclosure.
Compliance. Any EMC, safety or certification requirements the product must eventually meet.

Mechanical constraints come first. Board outline, connector positions and height limits should be agreed with whoever is designing the enclosure before layout starts. Discovering a connector conflict after fabrication costs a full revision cycle.

Stage 2: Schematic Capture

The schematic is the electrical intent of the design — what connects to what, and why. It contains no physical information about where anything sits.

Good schematics are drawn to be read by a person, not just consumed by the layout tool. That means signal flow left to right, power at the top and ground at the bottom, functional blocks visually grouped, and net names that describe purpose rather than sequence.

What reviewers actually check

Decoupling capacitors on every supply pin of every active device.
Pull-up and pull-down resistors present on reset, enable, boot-mode and bus lines.
Correct polarity and voltage rating on every electrolytic and tantalum part.
Debug and programming headers included — a prototype without them is very hard to diagnose.
Test points on key rails and signals.

Stage 3: Component Selection

Component choice constrains everything downstream: cost, lead time, assembly method and how easily the design can be built again in two years.

The dominant risk today is availability. A part that is elegant but on a 40-week lead time will stop the project. Check stock across multiple distributors and lifecycle status before committing, and identify a pin-compatible second source for anything critical.

Practical selection rules

Prefer common packages. 0402 and 0603 passives assemble reliably almost anywhere; 0201 narrows your options.
Verify the footprint against the datasheet. Library footprints are a frequent source of first-revision failures — do not assume a downloaded symbol is correct.
Derate deliberately. Capacitor voltage ratings and MOSFET current ratings should have real margin at the worst-case operating point.
Watch DC bias on ceramics. An MLCC can lose a large fraction of its rated capacitance at its working voltage.

Stage 4: PCB Layout

Layout converts electrical intent into copper geometry. It is where signal integrity, thermal performance and EMC behaviour are decided.

Stack-up

Layer count follows from routing density and the need for reference planes. Two layers suffice for simple, low-speed boards. Anything with a fast processor, switching regulator or sensitive analogue section benefits substantially from four layers, giving continuous ground and power planes.

The rules that matter most

Place before routing. Component placement determines route quality. Group by function and keep high-speed sections compact.
Decoupling capacitors go next to the pin they serve, with the shortest possible path to the ground plane.
Keep return paths continuous. A split in the reference plane under a fast signal is a common and hard-to-diagnose EMC problem.
Separate noisy and quiet domains. Switching regulators and their loops belong away from analogue front ends and antennas.
Respect RF keep-out zones. Wireless modules specify a clear area with no copper; treat it as mandatory.
Width for current. Trace width and copper weight must carry the worst-case current within an acceptable temperature rise.

Stage 5: Verification Before Fabrication

This stage is inexpensive. Skipping it is not.

Design Rule Check (DRC). Confirms clearances, trace widths, via sizes and annular rings meet the fabricator's stated capability.
Electrical Rule Check (ERC). Catches unconnected pins, conflicting outputs and missing power connections.
Layout-versus-schematic. Confirms the copper matches the intent.
3D and mechanical review. Check the populated board against the enclosure model for collisions and connector alignment.
Manufacturability review. Send the files to the fabricator for DFM feedback before ordering. Most will do this free and it routinely catches real issues.
Peer review. A second engineer reading the schematic and layout finds problems no automated check will.

Stage 6: Fabrication, Assembly and Bring-Up

Manufacturing files comprise Gerbers or ODB++, an NC drill file, a bill of materials with manufacturer part numbers, and a pick-and-place file. Include a clear fabrication note covering material, finish, solder mask colour and any impedance requirements.

For prototypes, surface finish matters more than it appears: ENIG gives a flat, durable surface that is far kinder to fine-pitch parts and repeated rework than HASL.

Bring-up: a deliberate sequence

Visual and microscope inspection for solder defects before applying power.
Continuity check between each supply rail and ground — catches shorts before they cause damage.
Power up through a current-limited supply and confirm the current draw is close to expectation.
Verify every rail in sequence with a meter and a scope before enabling downstream circuits.
Confirm the processor's clock, reset and boot behaviour, then establish debug connection.
Test each functional block individually, then together.

Expect to find issues. First-revision boards almost always need changes; the objective is to find them systematically and record them for revision B.

Conclusion

A PCB prototype that works first time is the result of decisions taken long before layout: clear requirements, components verified for availability and footprint, mechanical constraints agreed early, and verification treated as a stage rather than an afterthought.

The most common causes of a wasted revision are footprint errors, a missing debug header, and a mechanical conflict discovered after fabrication. All three are avoidable with a peer review and a DFM check — a few hours of effort against a multi-week revision cycle.

From Circuit Design to PCB Prototype

Stage 1: Requirements and Architecture